主要研究方向
1、功率半導(dǎo)體器件及其可靠性
2、微納電子器件輻射效應(yīng)與加固技術(shù)
3、微傳感器及接口電路
主要承擔(dān)的科研項(xiàng)目
1、國(guó)家自然基金面上項(xiàng)目
2、教育部科學(xué)技術(shù)研究重大項(xiàng)目
3、教育部“新世紀(jì)優(yōu)秀人才支持計(jì)劃”項(xiàng)目
4、黑龍江省自然科學(xué)基金重點(diǎn)項(xiàng)目
5、哈爾濱市科技局科技創(chuàng)新專項(xiàng)基金（杰出青年）
6、中央高校基本科研業(yè)務(wù)費(fèi)（創(chuàng)新團(tuán)隊(duì)）
獲獎(jiǎng)情況
黑龍江省科學(xué)技術(shù)獎(jiǎng)二等獎(jiǎng)（自然類，排名第一），2012年
黑龍江省科學(xué)技術(shù)獎(jiǎng)二等獎(jiǎng)（自然類，排名第五），2014年
黑龍江省青年科技獎(jiǎng), 2011年
黑龍江省高�？茖W(xué)技術(shù)獎(jiǎng)一等獎(jiǎng)（排名第一）, 2011年
代表性論文
1.Ying Wang*, Yue Zhang, Fei Cao, Ming guang Shan. Single-event Burnout Hardened Structure of Power UMOSFETs with Schottky Source. IEEE Transactions on Power Electronics, 2014, 29(7): 3733-3737.
2.Ying Wang*, Cheng-hao Yu, Zheng Dou, Wei Xue.Single-Event Burnout Hardening of Power UMOSFETs With Integrated Schottky Diode. IEEE Transactions on Electron Devices, 2014, 61(5): 1464-1469.
3.Ying Wang*, Xiao-wen He, Chan Shan. A Simulation Study of SoI-Like Bulk Silicon MOSFET With Improved Performance. IEEE Transactions on Electron Devices, 2014, 61(9): 3339 - 3344.
4.Ying Wang*, Wen-li Jiao, Hai-Fan Hu, Yun-tao Liu, Jing Gao. Split Gate Enhanced Power UMOSFET with Soft Reverse Recovery. IEEE Transactions on Electron Devices, 2013, 60(6): 2084-2089.
5.Ying Wang*, Hai-fan Hu, Cheng-hao Yu, Hao Lan. High Performance Split GateEnhanced UMOSFET with p-pillar Structure. IEEE Transactions on Electron Devices, 2013, 60(7): 2302-2307.
6.Ying Wang*, Yue Zhang, Li-guo Wang, Chenghao Yu. Single-event Burnout Hardening of Power UMOSFETs with Optimized Structure. IEEE Transactions on Electron Devices, 2013, 60(6): 2001-2007.
7.Ying Wang*, Yue Zhang, Cheng-hao Yu. Research of Single-event Burnout in Power UMOSFETs. IEEE Transactions on Electron Devices, 2013, 60(2): 161-166.
8.Ying Wang*, Ting Li,Yu-xian Chen, Fei Cao. High-Performance Junction Barrier Schottky Rectifier With Optimized Structure. IEEE Transactions on Electron Devices, 2012, 59(1): 114-120.
9.Ying Wang*, Hai-fan Hu, Wen-li Jiao, Yun-tao Liu, Lei Shao. Split Gate Enhanced UMOSFET with Optimized Layout of Trench Surrounding Mesa. IEEE Transactions on Electron Devices, 2012, 59(11): 3037-3041.
10.Ying Wang*, Li-kun Xu, Zhi-kun Miao. A Superjunction Schottky Barrier Diode with Trench Metal-Oxide-Semiconductor Structure. IEEE Electron Device Letters, 2012, 33(12):1744-1746.
11.Ying Wang*, Hai-fan Hu, Wen-Li Jiao and Chao Cheng. Gate Enhanced Power UMOSFET with Ultra-Low On-Resistance, IEEE Electron Device Letters. 2010, 31(4):338-340.
12.Ying Wang*, Hai-fan Hu and Wen-Li Jiao. High-Performance Gate-Enhanced Power UMOSFET With Optimized Structure, IEEE Electron Device Letters. 2010, 31(11):1281-1283.
